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Implementation of cryptographic algorithms on the FPGA platform
Zugárek, Adam ; Sládok, Ondřej (referee) ; Smékal, David (advisor)
This bachelor’s thesis describes methods of data encryption and author’s own implementation on FPGA. The goal of this thesis is to implement cipher on a hardware accelerated network card COMBO. In the introduction is described encryption using block ciphers. Cipher AES was chosen to implement, which is famous and most using cipher. Its detailed description is described in the first part of the thesis. In the second part is described the author’s own implementation of AES cipher in VHDL. In the next part is method of interconnecting the resulting program with a framework of the FPGA card – NetCOPE. Achieved results are in the end of this thesis. The resulting program cannot encrypt network communication. It only transforms data stored in the card, which then send to host computer.
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FITkit - PC Crypted Communication
Kouřil, Miroslav ; Strnadel, Josef (referee) ; Růžička, Richard (advisor)
This thesis deals with the issue of concealing confidential data being transmitted in between two systems. The coding standard AES as a block symmetric cipher has been selected. In practise, the connection between the FITkit platform and a PC was set via serial communication. The FITkit is programmed in language C and the PC in language C++ . There has been designed a simple protocol for setting up the connection and for the information exchange about encoding. Due to the difficulties with serial communication on the kit side there have been created two applications. The first application reads encoded kit data and translates them with the assistance of preset values. The second one communicates with the kit emulator on the other computer and works at full range, what means - establishing the connection, generating keys modes and number of encoding rounds, safe key exchange and the possibility of data reading and writing to the kit.
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Implementation of Encryption Algorithms in VHDL Language
Fruněk, Lukáš ; Fukač, Tomáš (referee) ; Kořenek, Jan (advisor)
The thesis deals with the design and implementation of the encryption algorithms DES and AES, operating in the CTR mode. The designed modules are implemented in the VHDL language and are mapped in the FPGA Intel Arria 10 SX 480. Algorithms are optimized for maximum throughput using loop unrolling and inner pipelining. The encryption module for DES reaches throughput of 26.2 Gbit/s with the circuit operating 410 MHz, and the module for AES reaches throughput of 34.6 Gbit/s with the circuit operating at 271 MHz. The reached throughput is in the order of thousand times faster than of the same encryption algorithms implemented in software for built-in microprocessors.
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Protection of highspeed communication systems
Smékal, David ; Martinásek, Zdeněk (referee) ; Hajný, Jan (advisor)
The diploma thesis deals with 128–bit AES data encryption and its implementation in FPGA network card using VHDL programming language. The theoretical part explains AES encryption and decryption, its individual steps and operating modes. Further was described the VHDL programming language, development environment Vivado, FPGA network card Combo–80G and configurable framework NetCOPE. The practical part is the implementation of AES–128 in VHDL. A simulation was used to eliminate errors, then the synthesis was performed. These steps were made using Vivado software. Last step of practical part was testing of synthesized firmware on COMBO–80G card. Total of 4 projects were implemented in FPGA card. Two of them were AES encryption and decryption with ECB mode and another two describe the encryption and decryption with CBC mode.
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Design of hardware cipher module
Bayer, Tomáš ; Stančík, Peter (referee) ; Sobotka, Jiří (advisor)
This diploma’s thesis discourses the cryptographic systems and ciphers, whose function, usage and practical implementation are analysed. In the first chapter basic cryptographic terms, symmetric and asymetric cryptographic algorithms and are mentioned. Also usage and reliability are analysed. Following chapters mention substitution, transposition, block and stream ciphers, which are elementary for most cryptographic algorithms. There are also mentioned the modes, which the ciphers work in. In the fourth chapter are described the principles of some chosen cryptographic algorithms. The objective is to make clear the essence of the algorithms’ behavior. When describing some more difficult algorithms the block scheme is added. At the end of each algorithm’s description the example of practical usage is written. The chapter no. five discusses the hardware implementation. Hardware and software implementation is compared from the practical point of view. Several design instruments are described and different hardware design programming languages with their progress, advantages and disadvantages are mentioned. Chapter six discourses the hardware implementation design of chosen ciphers. Concretely the design of stream cipher with pseudo-random sequence generator is designed in VHDL and also in Matlab. As the second design was chosen the block cipher GOST, which was designed in VHDL too. Both designs were tested and verified and then the results were summarized.
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Web application for file encryption
Tatar, Martin ; Blažek, Petr (referee) ; Zeman, Václav (advisor)
The bachelor thesis is focused on developing a web application for file encryption. In the theoretical part symmetric encryption algorithms are divided into block ciphers and stream ciphers. Selected ciphers are described and their properties are compared. Then the modes of operation for block ciphers are described. The developed application encrypts both files and text inputs by the selected algorithm and can operate in various modes of operation. In addition to this functionality the application is supplemented with descriptions of available ciphers and modes of operation.
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Implementation of Encryption Algorithms in VHDL Language
Fruněk, Lukáš ; Fukač, Tomáš (referee) ; Kořenek, Jan (advisor)
The thesis deals with the design and implementation of the encryption algorithms DES and AES, operating in the CTR mode. The designed modules are implemented in the VHDL language and are mapped in the FPGA Intel Arria 10 SX 480. Algorithms are optimized for maximum throughput using loop unrolling and inner pipelining. The encryption module for DES reaches throughput of 26.2 Gbit/s with the circuit operating 410 MHz, and the module for AES reaches throughput of 34.6 Gbit/s with the circuit operating at 271 MHz. The reached throughput is in the order of thousand times faster than of the same encryption algorithms implemented in software for built-in microprocessors.
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Web application for file encryption
Tatar, Martin ; Blažek, Petr (referee) ; Zeman, Václav (advisor)
The bachelor thesis is focused on developing a web application for file encryption. In the theoretical part symmetric encryption algorithms are divided into block ciphers and stream ciphers. Selected ciphers are described and their properties are compared. Then the modes of operation for block ciphers are described. The developed application encrypts both files and text inputs by the selected algorithm and can operate in various modes of operation. In addition to this functionality the application is supplemented with descriptions of available ciphers and modes of operation.
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Implementation of cryptographic algorithms on the FPGA platform
Zugárek, Adam ; Sládok, Ondřej (referee) ; Smékal, David (advisor)
This bachelor’s thesis describes methods of data encryption and author’s own implementation on FPGA. The goal of this thesis is to implement cipher on a hardware accelerated network card COMBO. In the introduction is described encryption using block ciphers. Cipher AES was chosen to implement, which is famous and most using cipher. Its detailed description is described in the first part of the thesis. In the second part is described the author’s own implementation of AES cipher in VHDL. In the next part is method of interconnecting the resulting program with a framework of the FPGA card – NetCOPE. Achieved results are in the end of this thesis. The resulting program cannot encrypt network communication. It only transforms data stored in the card, which then send to host computer.
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FITkit - PC Crypted Communication
Kouřil, Miroslav ; Strnadel, Josef (referee) ; Růžička, Richard (advisor)
This thesis deals with the issue of concealing confidential data being transmitted in between two systems. The coding standard AES as a block symmetric cipher has been selected. In practise, the connection between the FITkit platform and a PC was set via serial communication. The FITkit is programmed in language C and the PC in language C++ . There has been designed a simple protocol for setting up the connection and for the information exchange about encoding. Due to the difficulties with serial communication on the kit side there have been created two applications. The first application reads encoded kit data and translates them with the assistance of preset values. The second one communicates with the kit emulator on the other computer and works at full range, what means - establishing the connection, generating keys modes and number of encoding rounds, safe key exchange and the possibility of data reading and writing to the kit.
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